`ifndef COMMON_SV
`define COMMON_SV

`define VERILATOR
// Common
`define ZERO_WORD           32'h0
`define INST_BUS            31:0
`define INST_ADDR_BUS       31:0
`define ZERO_DWORD          64'b0       

`define WRITE_ENABLE    1'b1                
`define WRITE_DISABLE   1'b0
`define READ_ENABLE    1'b1                
`define READ_DISABLE   1'b0

`define DOUBLE_WORD_BUS 63:0
`define HALF_WORD_BUS   15:0

`define TRUE_V          1'b1                
`define FALSE_V         1'b0

`define WORD_BUS        31: 0               
`define DOUBLE_REG_BUS  63: 0               

`define LSHIFT(x) ((x)<<1)
`define RSHIFT(x) ((x)>>1)
`define LSHIFTX(x) (1<<(x))
`define RSHIFTX(x) (1>>(x))

// MEM
`define READ_BUFFER_SIZE 16
`define READ_BUFFER_WIDTH $clog2(`READ_BUFFER_SIZE)
`define WRITE_BUFFER_SIZE 16
`define WRITE_BUFFER_WIDTH $clog2(`WRITE_BUFFER_SIZE)
`endif